NOR Logic gate and NAND averify and Implement using VHDL code.

Nor Logic gate

CIRCUIT:

CODE:

 

 

LIBRARY IEEE;

USE IEEE.STD_LOGIC_1164.ALL;

ENTITY UNI_GATE IS

PORT(A,B:IN STD_LOGIC;

                        NAND_OUT,NOR_OUT: OUT STD_LOGIC);

END UNI_GATE;

ARCHITECTURE UNI_GATE OF UNI_GATE IS

BEGIN

                        NAND_OUT <= A NAND B;

                        NOR_OUT <= A NOR B;

END UNI_GATE;

 

 

 

WAVE FORMS:

 

 

 

Logic gates http://projugaadu.com/category/v-l-s-i/

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